主持的主要项目
（1）国家自然科学基金， “基于加速网的光电混合三维互连架构设计方法研究”，在研，2018.01-
（2）国家自然科学基金， “混合型三维片上网络中基于热/流感知的散热管理机制研究”
（3）江苏省产学研前瞻性联合创新基金，“基于演化技术的AES加密协处理器研究与SoC原型设计”
（4）国家自然科学基金， “基于全局通信管理的NoC低功耗容错机制研究”
（5）江苏省自然科学基金， “基于动态路径分配的低功耗高性能片上网络关键技术研究”
（6）江苏省科技支撑计划， “传感器节点片上系统SoC芯片研究”

（1）嵌入式军用手持终端
（2）**型飞机液压系统试验台数据采集、监控系统
（3）**型飞机燃油系统试验台数据采集、监控系统
（4）神舟号载人飞船液体冷却回路模拟试验装置的研究
（5）卫星热控系统自动化设计平台研究
（6）**型雷达发射、接收组件故障测试系统
（7）基于Linux平台的天气雷达实时终端显控系统
（8）嵌入式电力故障录波系统
（9）基于嵌入式TCP/IP协议栈的电力录波主控系统
（10）电网故障信息集成与控制系统
（11）水电自动化监控系统
（12）地铁信号系统组态软件
（13）基于边界扫描技术的测试系统
（14）A320飞机飞行员飞行品质评估系统软件
（15）南京地铁一号线PIS系统改造
（16）卫星热控材料基础数据库
（17）同步时钟系统接收与时钟单元
（18）应用于电力系统的嵌入式网路时间服务单元
（19）基于FPGA的大流量数据识别与分流系统
（20）双网融合的多媒体传感网络系统设计
（21）基于传感器节点芯片的Zigbee协议与AES算法研究与设计
（22）网络分析仪中基于PCIE的数据传输系统设计
（23）B737飞机飞行员飞行品质评估系统软件
（24）单兵雷达信号处理算法FPGA IP设计
（25）基于FPGA的网络与RapidIO协议转换
（26）基于FPGA实现的信号处理算法IP设计
（27）意识与图像识别系统
（28）地铁线路组态配置软件ATS-LCT设计
（29）基于FPGA实现的复杂信号处理算法IP设计
（30）飞行技术服务平台软件设计

至2018年（主要的刊物论文）：
[1] Li Jianhua, Wu Ning, Hu Yongliang, et al. “An Irregular Topology Generation Using Power-Interference Co-Optimization for Hybrid Application-Specific Wireless NoC”, Journal of Circuits, Systems & Computers, 2018, 27(3).
[2] Yasir, Wu Ning , Chen Xin , et al. “Area-Efficient Hardware Architectures of MISTY1 Block Cipher”, Radioengineering, 2018, 27(2), pp. 541-548.
[3] Jinbao Zhang，Ning Wu，Fen Ge, et al. “Countermeasure against fault sensitivity analysis based on clock check block”, IEICE Electronics Express, 2018, 15(11), pp. 1-6.
[4] Ye Yunfei Ye , Wu Ning, Zhang Xiaoqiang, et al. “An Optimized Design for Compact Masked AES S-Box Based on Composite Field and Common Subexpression Elimination Algorithm”, Journal of Circuits, Systems & Computers, 2018:1850171.
[5] LIU Yaoping, WU Ning, ZHANG Xiaoqiang, ZHOU Fang, and GE Fen. “A Compact Implementation of AES S-Box Using Evolutionary Algorithm”, Chinese Journal of Electronics, 2017, 26(4), pp. 688-695.
[6] Yasir, Ning Wu, Xiaoqiang Zhang, Rehan Yahya. “Highly optimised reconfigurable hardware architecture of 64 bit block ciphers MISTY1 and KASUMI”, IET Electronics Letters, 2017, 53(1), pp. 10-12.
[7] Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou. “Collaborative fuzzy-based partially-throttling dynamic thermal management scheme for three-dimensional networks-on-chip”, IET Computers & Digital Techniques, 2017, 11(1), pp. 24-32.
[8] Gaizhen Yan, Ning Wu, Fen Ge, Hao Xiao, Fang Zhou. “ArR-DTM: A routing-based DTM for 3D NoCs by adaptive degree regulation”, IEICE Electronics Express, 2017, 14(9), pp. 1-9.
[9] Yaoping Liu, Ning Wu, Xiaoqiang Zhang, Fang Zhou. “A new compact hardware architecture of S-Box for block ciphers AES and SM4”, IEICE Electronics Express, 2017, 14(11), pp. 1-6.
[10] Wentao Xu, Ning Wu, Bing Liu. “A blocking optimization method by convergence of cores for application-based optical circuit switched network-on-chip”, Microprocessors & Microsystems, 2017, 53, pp. 168-177.
[11] Jintao Zheng, Wu Ning, Lei Zhou, Yunfei Ye, Ke Sun, DFSB-Based Thermal Management Scheme for 3-D NoC-Bus Architectures, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24(3):920-931
[12] Zhang Xiaoqiang, Wu Ning, Zhou Fang, Ge Fen, Optimization of Areaand Delay for Implementation of the Composite Field Advanced Encryption Standard S-Box, Journal of Circuits, Systems, and Computers, 2016, 25(05):1-27
[13] Hao Xiao, Wu Ning, Fen Ge, Tsuyoshi Isshiki, Hiroaki Kunieda, Jun Xu, Yuangang Wang, Efficient Synchronization for Distributed Embedded Multiprocessors, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2016, 24(2):779-783
[14] Xinjie Huang, Wu Ning, Xiaoqiang Zhang, Yaoping Liu, An Evolutionary Algorithm Based on Novel Hybrid Repair Strategy for Combinational Logic Circuits, IEICE Electronics Express, 2015, 12(22):1-10
[15] Jianhua Li, Wu Ning, Yongliang Hu, Xiaoqiang Zhang, High-performance adaptive hybrid wireless NoC architecture based on improved congestion measurement, IEICE Electronics Express, 2015, 12(12):1-12
[16] Jintao Zheng, Wu Ning, Gaizhen Yan, Fen Ge, Lei Zhou, Dynamically reconfigurable simulation platform for 3D NoC based on multi-FPGA, IEICE Electronics Express, 2015, 12(7):1-12
[17] Taotao Zhang, Wu Ning, Lei Zhou, Fang Zhou, BTorus: A novel thermal-traffic balanced NoC topology, IEICE Electronics Express, 2015, 12(8):1-6
[18] Zhiping Wu, Wu Ning, Lei Zhou, Fen Ge, The adaptive thermal and traffic-balanced routing algorithm based on temperature analysis and traffic statistics, IEICE Electronics Express, 2015, 12(7):1-6
[19] Hao Xiao, Wu Ning, Fen Ge, Guanyu Zhu, Lei Zhou, Distributed Synchronization for Message-passing based Embedded Multiprocessors, IEICE Transaction on Information and Systems, 2015, E98-D(2):272-275
[20] Xiaoqiang Zhang, Wu Ning*, Gaizhen Yan, Liling Dong, Hardware implementation of compact AES S-box, IAENG International Journal of Computer Science, 2015, 42(2):125-131
[21] Taotao Zhang, Wu Ning*, Fang Zhou, Lei Zhou, Xiaoqiang Zhang, A Traffic Equilibrium Mapping Method with Energy Minimization for 3D NoC-Bus Mesh Architecture, IAENG International Journal of Computer Science, 2015, 42(1):1-7
[22] 曾纯，吴宁，张肖强，周芳，叶云飞. 基于多因子CSE算法的AES S盒电路优化设计，电子学报，2014, 42(6): 1238-1243。
[23] ZHANG Xiaoqiang, WU Ning, ZHOU Fang, and CHEN Xin, “An Optimized Delay-Aware Common Subexpression Elimination Algorithm for Hardware Implementation of Binary-Field Linear Transform,” IEICE Electronics Express, Vol.11, No.22, 1-8, 2014.
[24] Chen Xin, Wu Ning, Bai Na, Huang Hui, Hu Wei. Built-in self test design of power switch with clock-gated charge/discharge transistor. Computers & Digital Techniques, IET, 2014, 8(2): 59-69.
[25] Ning Wu, Xiaoqiang Zhang, Yunfei Ye, and Lidong Lan. A New Common Subexpression Elimination Algorithm for Constant Matrix Multiplications Over Binary Field. Transactions on Engineering Technologies, Springer, 2014, pp131-145.
[26] 周芳，吴宁，叶云飞，葛芬. 一种多重约束下的NoC电压频率岛划分方法，东南大学学报(自然科学版), 44(6), pp1131-1137, 2014/11
[27] Lei Zhou, Ning Wu, Xin Chen. A Design Methodology for Three-Dimensional Hybrid NoC-Bus Architecture. IEICE Transactions of Electronic, 2013, E96-C(4): 492-500
[28] 周磊, 吴宁, 李云. 一种基于2D-Mesh的NoC无死锁容错路由算法. 上海交通大学学报, 2013, 47(1): 18-22
[29] Zhou lei, Wu Ning, Ge Fen. A joint-coding scheme with crosstalk avoidance in network on chip. TELKOMNIKA Indonesian Journal of Electrical Engineering, 2013, 11(1):1-8.
[30] 周芳，吴宁，周磊，张颖，面向低功耗的NoC虚通道分配算法，东南大学学报（自然科学版），2013,43(2):263-267.
[31] Ning Wu, Xiaoqiang Zhang, Yunfei Ye, and Lidong Lan. Improving Common Subexpression Elimination Algorithm with A New Gate-Level Delay Computing Method. Proceedings of the World Congress on Engineering and Computer Science 2013 Vol II, WCECS 2013, 23-25 October, 2013, San Francisco, USA, pp677-682.
[32] Jianhua, Li, Ning, Wu; Yongliang, Hu. Modeling and simulation of intra-chip wireless propagation channels for hybrid WiNOC. Source: Sensors and Transducers, v 155, n 8, p 86-97, August 2013
[33] 葛芬, 吴宁, 秦小麟, 等. 基于网络监控器的专用片上网络动态容错路由[J]. 电子学报, 2013, 41(11): 2135-2143.
[34] Chen Xin, Wu Ning, Hu Wei, and Shan Weiwei. BIST Design of Power Switch. IEICE Electronics Express, 2013，10(15): 1-5.
[35] Ning Wu, Yifeng Mu, Fen Ge, “GA-MMAS: an Energy- and Latency-aware Mapping Algorithm for 2D Network-on-Chip”, IAENG International Journal of Computer Science, 2012, 39(1), pp109-114.
[36] Ge Fen, Wu Ning, Qin Xiaolin, Zhang Ying, “Performance- and cost-aware topology generation based on clustering for application-specific network on chip”, IAENG International Journal of Computer Science, 2012, 39(1), pp 88-95..
[37] Zhou Fang, Wu Ning, Zhang Ying, “NoC router power macro-modeling at high level”, Advances in Intelligent and Soft Computing, v141 AISC, pp199-206, 2012.
[38] Lei Zhou, Ning Wu, Xuelong Hu and Fen Ge. A Detour-Path Based Fault-tolerant Routing Algorithm for Network on Chip. International Review on Computers and Software, v 7, n 7, p 3481-3487, 2012
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