2006.09 – 2011.06 荷兰特温特大学(Twente University) 电子工程博士
2002.09 – 2006.06 德国锡根大学（Siegen University） 物理硕士
1997.09 – 2001.06 浙江大学物理系 本科

2015-至今 湖南大学电气与信息工程学院副教授

2019-至今 博士生导师
2011-2014 美国国家技术与标准局 （NIST）客座研究员
2015年-至今 任湖南省电工学会 委员
2011年-至今 任IEEE电子器件协会 会员
国际电气电子工程师学会 （IEEE）会员
Advances in Condensed Matter Physics 客座编辑
Journal of Solid State Electronics 审稿人
Journal of Semiconductor Manufacturing 审稿人

1. 2007–2011，荷兰STW基金(等同于中国的“863”计划) 参与
2. 2011-2014，美国国家标准与技术院重点研究项目,主持2项，参与1项
3. 2015-2019，湖南大学青年教师成长计划项目，主持
4. 2015-2017，中芯国际“02”国家重大专项产学研子课题，主持
5. 2019-至今，梯次利用动力电池应用场景分析及再利用寿命和经济评估技术研究，主持

1. J. Liu, M. Shi, J. Lu*, and M. P. Anantram, "Analysis of electrical-field-dependent Dzyaloshinskii-Moriya interaction and magnetocrystalline anisotropy in a two-dimensional ferromagnetic monolayer," Physical Review B, vol. 97, p. 054416, 02/16/ 2018
2. J. Liu, M. P. Anantram, X. Xu, and J. Lu, "Analysis of Sub-threshold Electron Transport Properties of Ultra-scaled Amorphous Phase Change Material Germanium Tellurid," in 2017 IEEE 12th International Conference on ASIC, Guiyang, 2017, p. Paper_ID 0919.
3. J. B. Sun and J. W. Lu*, "Interface Engineering and Gate Dielectric Engineering for High Performance Ge MOSFETs," Advances in Condensed Matter Physics, p. 9, 2015.
4. J. W. Lu#, G. F. JiaoE, J. P. Campbell, J. T. Ryan, K. P. Cheung, C. D. Young, Bersuker, G, Circuit speed timing jitter increase in random logic operation after NBTI stress, IEEE International Reliability Physics Symposium, 2014, USA，Hawaii, 2014.06
5. PBTI-Induced Random Timing Jitter in Circuit-Speed Random Logic; IEEE Transaction on Electron Device; 2014 volume 61, issue 11，pages 3613-3618； J. Lu, G. F. Jiao, C. Vaz, J.P. Campbell, J.T. Ryan, K. P. Cheung, G. Bersuker, C.D. Young; SCI 收录
6. Device-Level Experimental Observations of NBTI-Induced Random Timing Jitter, IEEE Transaction on Device and Materials Reliability; 2014, volume 14, issue 4, pages 972-977; J. Lu#, G. F. Jiao#, J.P. Campbell, J.T. Ryan, K. P. Cheung, C.D. Young ，G. Bersuker, #co-first author， SCI收录
7. Device Level PBTI-induced Timing Jitter Increase in Circuit-Speed Random Logic; IEEE International VLSI Technology Symposium; 2014, June 9-12, USA, Honolulu, HI, USA； J. Lu, C. Vaz, J.P. Campbell, J.T. Ryan, K. P. Cheung, G. F. Jiao, G. Bersuker, C.D. Young,EI收录,电子器件领域最好的两个国际会议之一
8. Circuit Speed Timing Jitter Increase in Random Logic Operation after NBTI Stress; IEEE International Reliability Physics Symposium; 2014 June 1-5, Waikoloa, HI, USA；J. Lu#, G. F. Jiao#, J.P. Campbell, J.T. Ryan, K. P. Cheung, C.D. Young ，G. Bersuker, #co-first author，EI 收录
9. Impact of BTI on random logic circuit critical timing; 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT); 2014 Oct. 28-31，Guilin, China；K. P. Cheung， J. Lu, G. F. Jiao, C. Vaz,J.P. Campbell, J.T. Ryan， EI 收录
10. Integration of solar cells on top of CMOS chips Part II: CIGS Solar cells; IEEE Transaction on Electron Device; 2011, volume 58, issue 8, pages 2620-2027； J. Lu, W. Liu, A. Y. Kovalgin, Y. Sun and J. Schmitz， SCI 收录
11. Integration of solar cells on top of CMOS chips Part I: a-Si Solar cells; IEEE Transaction on Electron Device; 2011, volume 58, issue7, pages 2014-2021；J. Lu, C. H. M. Van Der Werf, A. Y. Kovalgin, R. E. I. Schropp, and J. Schmitz， SCI 收录
12. Above-CMOS a-Si and CIGS solar cells for powering autonomous microsystems; 2010 IEEE International Electron Devices Meeting; 2010 Dec. 6-8，San Francisco, CA, USA，J. Lu, W. Liu, C.H.M. van der Werf, A.Y. Kovalgin, Y. Sun, R.E.I. Schropp, J. Schmitz，EI 收录，电子器件领域最好的两个国际会议之一
13. Materials Characterization of CIGS solar cells on Top of CMOS chips; 2011 MRS Spring Meeting; 2011 Apr. 25-29, San Francisco, CA,USA, 1325；J. Lu, W. Liu, A. Y. Kovalgin, Y. Sun and J. Schmitz，EI 收录
14. Lu, J., A. Y. Kovalgin and J. Schmitz (2009). Influence of passivation process on chip performance. 12th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE 2009, Technology Foundation (STW)